ESTRADA, Cristine Jin D.S.

ESTRADA, Cristine Jin D.S.

Cristine Jin Estrada received her PhD in Electronic and Computer Engineering at the Hong Kong University of Science and Technology (HKUST) in 2023, where her research involves the design, fabrication, modeling, and circuit simulation of two-dimensional (2-D) transistors. She was a key member of the emerging device and systems group at HKUST, and their work on complementary 2-D transistors received the best paper award at the 51st IEEE European Solid-State Device Research Conference (ESSDERC) in 2021, which is the largest conference in the area of semiconductor devices and circuits in Europe. She also received her MPhil in ECE at HKUST with a nanotechnology concentration in 2020, where she developed the first compact model for the current-assisted photonic demodulator (CAPD), a time-of-flight (ToF) CMOS image sensor, which can enable ToF circuit designers to simulate their whole pixel design, including the peripherals. Consequently, she was awarded the best student paper for the CAPD compact modeling at the IEEE Student Symposium on Electron Devices and Solid-State Circuits (s-EDSSC) in Hong Kong in 2020.

Given her academic excellence, research ability and potential, communication and interpersonal skills, and leadership skills, she was awarded a Hong Kong PhD Fellowship Scheme (HKPFS), a highly competitive and prestigious award from the Research Grants Council of Hong Kong wherein only 250 candidates from all over the world are selected in 2020 and was also awarded an HKUST Excellent Research Award in the same year.

She received BSc in Electronics Engineering with Latin honors (Cum Laude) from the University of Santo Tomas (UST) in 2015, where she is a faculty member now. Her research interests involve 2-D materials-based devices and circuits, complementary metal-oxide semiconductor (CMOS) circuits and sensors, nano-devices fabrication and processing, and device modeling.

Updates

Academic Qualifications

Research Highlights

Research Interests

Academic Qualifications

Degrees

  • Doctor of Philosophy in Electronic and Computer Engineering, The Hong Kong University of Science and Technology, 2023
  • Master of Philosophy in Electronic and Computer Engineering with Nanotechnology Concentration, The Hong Kong University of Science and Technology – Hong Kong, 2020 
  • Bachelor of Science in Electronics Engineering, University of Santo Tomas – Manila, Philippines, 2015 

Research Highlights

  • Compact Modeling of Current-Assisted Photonic Demodulator (CAPD) for Time-of-Flight CMOS Image Sensor – MPhil thesis defended which led to journal publication in IEEE Transactions on Electron Devices 
  • Currently working on the emerging field of two-dimensional (2-D) materials-based devices and circuits

Research Interests

  • Two-dimensional (2-D) materials-based devices and circuits
  • Semiconductor electronic and photonic devices
  • CMOS image sensors

Courses Handled

Major Recognitions

Professional Activities

Courses Handled

  • Microprocessor Systems
  • Computer Architecture
  • Discrete Mathematics
  • Digital Communication Systems 

Major Recognitions

  • Best Paper Award in 2021 IEEE 51st European Solid-State Device Research Conference (ESSDERC)
  • Hong Kong PhD Fellowship Scheme (HKPFS) Awardee
  • HKUST Excellent Research Awardee
  • Best Student Paper Award in 2020 IEEE Student Symposium on Electron Devices and Solid-State Circuits (s-EDSSC)
  • Cum Laude (BSc ECE, 2015)

Professional Activities

  • Member, Institute of Electrical and Electronics Engineers (IEEE)
  • Reviewer, IEEE Journal of the Electron Devices Society (since 2019)
  • Associate Member, National Research Council of the Philippines

Selected Publications

Selected Publications

  • C. J. Estrada, Z. Ma, L. Zhang, and M. Chan, “Threshold Voltage Model for 2D FETs with Undoped Body and Gated Source,” in IEEE Transactions on Electron Devices, vol. 70, no. 5, pp. 2575-2580, May 2023, doi: 10.1109/TED.2023.3255833.
  • C. J. Estrada, Z. Ma and M. Chan, “Complementary Two-Dimensional (2-D) FET Technology With MoS2/hBN/Graphene Stack,” in IEEE Electron Device Letters, vol. 42, no. 12, pp. 1890-1893, Dec. 2021, doi: 10.1109/LED.2021.3124823.
  • C. J. Estrada, Z. Ma and M. Chan, “Complementary Two-Dimensional (2-D) MoS2 FET Technology,” ESSDERC 2021 – IEEE 51st European Solid-State Device Research Conference (ESSDERC), 2021, pp. 219-222, doi: 10.1109/ESSDERC53440.2021.9631795.
  • C. J. Estrada, Y. Xiao, C. Xu and M. Chan, “Physical Model of Current-Assisted Photonic Demodulator (CAPD) for Time-of-Flight CMOS Image Sensor,” in IEEE Transactions on Electron Devices, vol. 67, no. 7, pp. 2825-2830, July 2020, doi: 10.1109/TED.2020.2995349.
  • C. J. Estrada, Y. Xiao and M. Chan, “Design Considerations for Current-Assisted Photonic Demodulator (CAPD) in Time-of-Flight CMOS Image Sensor,” 2020 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), Hsinchu, Taiwan, 2020, pp. 54-55, doi: 10.1109/VLSI-TSA48913.2020.9203590.
  • C. J. Estrada, C. Xu and M. Chan, “Design of Current-Assisted Photonic Demodulator (CAPD) for Time-of-Flight CMOS Image Sensor,” 2019 IEEE 13th International Conference on ASIC (ASICON), Chongqing, China, 2019, pp. 1-4, doi: 10.1109/ASICON47005.2019.8983514.